Conventionally, a TCP (Tape Carrier Package) is known as an example of a semiconductor device prepared by mounting a semiconductor element on a flexible wiring substrate by bonding. In TCP, an opening section is formed in advance in that portion of an insulating tape on which the semiconductor element is to be mounted, the opening section penetrating through the insulating tape. The semiconductor element is connected with a tip portion of a wiring pattern cantilevered over the opening section.
Recently, a COF (Chip On Film) (hereinafter, just referred to as a COF) is another example of a semiconductor prepared by mounting a semiconductor element on a flexible wiring substrate. Use of the COF is increasing. The COF has no opening section for mounting the semiconductor element: in COF the semiconductor is mounted by being bonded on a surface of a thin insulating tape.
Purposes of usage of the COF requires the flexible wiring substrate of the COF to be, for example, a thin insulting film that can be freely bended. Each wire of the wiring pattern provided on a surface of the thin film insulating tape is electrically connected with a corresponding terminal of the semiconductor element. Moreover, an external connection section of the thin film insulating tape is connected with a liquid crystal panel, a printed substrate, or the like. The other portion of the wiring pattern is an exposed portion thereof. The exposed portion of the wiring pattern is coated with a solder resist, thereby to be insulated.
At present, the use of COF is increasing, so as to allow to increase a number of pins. Because the semiconductor is also required to be smaller and thinner, the thin film insulting tape of the COF should be so configured that (i) a connection section through which the thin film insulating tape is connected with the semiconductor and (ii) the external connection section of the wiring pattern are fine-pitched, and that the thin film insulating tape and the wiring pattern are thinner. In order to have a smaller pitch of inner leads, the inner leads should have a smaller width and thinner thickness.
An example (conventional Example 1) of a method for manufacturing a COF 31 is explained below, referring to FIGS. 11(a) to 11(e). In this method, thermocompression bonding is adopted. (cf. Japanese Patent Application Publication No. 2001-176918 (Tokukai 2001-176918; published on Jun. 29, 2001; hereinafter referred to as Patent Document 1).
In FIG. 11(a), A wiring pattern 22 is illustrated. The wiring pattern 22 provided on a thin film insulating tape 21 is prepared by plating Au on a Ni background prepared by plating. The pattern 22 has a connection section 24. A resist 25 is so applied on the pattern 22 that the connection 24 is left exposed. As illustrated in FIG. 11(b), a protrusion electrode 26 is positioned on the connection section 24 of the wiring pattern 22. The protrusion electrode 26 is an Au bump.
As illustrated in FIG. 11(c), the semiconductor element 23 and the wiring pattern 22 of the thin film insulating tape 21 are bonded by thermocompression bonding performed at a high temperature in a range of 400° C. to 450° C. with a pressure in a range of 0.1 to 0.3N per bump, the pressure applied along direction D6. With this, the wiring pattern 22 is bonded such that the protrusion electrode 26 is intruded into the wiring pattern 22. A diffusion layer or an alloy layer is formed at a portion 32, at which the wiring pattern 22 and the protrusion electrode 26 are bonded.
After that, an under-fill resin 27 is introduced in a gap between the semiconductor element 23 and the thin film insulating tape 21 by causing the under-fill resin 27 to flow in direction D7 from a nozzle 30, as illustrated in FIG. 11(d). As illustrated in FIG. 11(e), the under-fill resin 27 is thermoset by heat application D8, thereby firmly bonding the semiconductor 23 and the thin film insulating tape 21.
The thermocompression bonding has several problems.
One of the problems is the use of high temperature of 400° C. or more in bonding. This causes a significant expansion/shrinkage in the wiring pattern at the connection section due to thermal expansion, thermal shrinkage, and moisture absorption and dehydration. This results in cumulative dimensional error in the connection section of the wiring pattern, causing connection failure more liable.
Moreover, the use of high pressure is also a problem. The application of high pressure likely causes deformation of the wiring pattern at the connection section so that the wiring pattern is deformed by the semiconductor element around the protrusion electrode of the semiconductor element. This likely causes defect caused by touching (edge touch) of the wiring pattern with the semiconductor.
These problems become more sever when the connection section is fine-pitched and the wiring pattern becomes thinner, which are objects of the use of COF.
To cope with these problems, another examples of the method for manufacturing COF are known for bonding and sealing: an MBB (Micro Bump Bonding), an NCP (Non Conductive Paste), an ACP (Antisotropic Conductive Paste), and the like (hereinafter they are referred to as NCP and the like methods. The MBB is conventionally well known. Much attention is paid to the NCP and ACP, recently.
These NCP and the like methods allow bonding at low temperature: an insulating resin is intervened between a semiconductor and an insulating tape (flexible wiring substrate) and a protrusion electrode of the semiconductor element and a wiring pattern of the flexible wiring substrate are bonded together and sealed with the insulating resin at the same time. The NCP and the like methods are effective for attaining fine-pitched and thin wiring pattern to allow the wiring pattern to have a large number of pins. The NCP and the like methods are also effective for preventing the “edge touch”, which is likely caused in such fine-pitched and thin wiring pattern. Many studies have be made on the NCP and the like methods.
For example, manufacturing methods adopting MBB are disclosed in Japanese Patent Application Publication No. 60-262430 (Tokukaisho No. 60-262430, published on Dec. 25, 1985; hereinafter Patent Document 2), Japanese Patent Application Publication No. 63-151033 (Tokukaisho No. 60-262430, published on Jun. 23, 1988; hereinafter Patent Document 3), and the like.
The manufacturing method (hereinafter Conventional Example 2) disclosed in Patent Document 2 is explained below, referring to FIGS. 12 and 13(a)-13(d). FIGS. 13(a)-13(d) are cross sectional views taken on C-C of a plane views of FIG. 12. Hereinafter, members having the same function as the conventional Example 1 are labeled with the same reference numerals.
In conventional Example 2, a photocuring or thermosetting resin 27 is applied on a wiring pattern 22 of a wiring substrate (insulating tape) firstly as illustrated in FIGS. 13(a) and 13(b).
Next, as illustrated in FIG. 13(c), a protrusion electrode 26 is positioned on a connection section 24 of the wiring pattern 22 and then pressed in Direction D9. With this, the resin 27 between the protrusion electrode 26 and the wiring pattern 22 is pushed away in Direction D10, thereby to attain an electric connection simply by pressing the protrusion electrode 26 to be in contact with the connection section 24 of the wiring pattern 22. This also causes the resin 27 to reach a circumference of the semiconductor 23.
After that, as illustrated in FIG. 13(d), the resin 27 is exposed to light or heated as indicated by Direction D11, thereby photocuring/thermosetting the resin 27. In this way, the semiconductor 23 and the wiring substrate 21 are firmly bonded. In case of the thermal curing, the heat applied is 150° C. or lower.
Next, the manufacturing method (conventional method 3) disclosed in Patent Document 3 is explained below, referring to FIGS. 12 and 14(a)-14(d). In this case again, FIGS. 14(a)-14(d) are cross sectional views taken on C-′C of the plane view of FIG. 12.
In the conventional Example 3, as illustrated in FIGS. 14(a) and 14(b), a thermosetting resin 27 is applied on a wiring pattern 22 of the wiring substrate 21.
After that, as illustrated in FIG. 14(c), a protrusion electrode 26 is positioned on a connection section 24 of the wiring pattern 22, so that the protrusion electrode 26 is in contact with the connection section 24. Then, the semiconductor 23 is pressed (in Direction D9) toward the wiring substrate 21 by using a pulse heating tool.
Then, as illustrated in FIG. 14(d), after the resin 27 on the wiring pattern 22 is pushed away to a circumference of the connection section, electricity is supplied to a pulse heating tool with pressure applied on the semiconductor element 23 in Direction 12. With this, the semiconductor element 23 is heated with a temperature of 100 to 250° C., thereby curing the resin 27. This causes the semiconductor element 23 to be firmly bonded with the wiring substrate 21 and causes the protrusion electrode 26 to be electrically connected with the wiring pattern 22.
The arrangements of the NCP and the like methods, however, have problem in that no sufficient connection strength can be achieved with the NCP and the like methods.
In the NCP and the like method, the protrusion electrode of the semiconductor element and the wiring pattern of the thin film insulating tape are connected only by (i) the contact caused by the pressure application and by (ii) the shrinkage of the cured resin. Therefore, the connection strength (connection reliability) is low in the NCP and the like methods.
Because of this, if, after mounting, the semiconductor device is put under a usage environment, for example, in which the semiconductor is repeatedly exposed to a low temperature and high temperature, the insulating resin might be peeled off from the thin film insulating tape or from the semiconductor element due to a force occurred due to a difference between materials of the thin film insulating tape, semiconductor element, and the insulating resin when thermal expansion and thermal shrinkage are repeated as a result of the temperature cycle. Moreover, if the semiconductor device is put under a highly humid environment after mounting and moisture absorption and expansion are repeated, the peeling-off may similarly occur. The peeling-off causes poor electric connection between the thin film insulating tape of the wiring pattern and the protrusion electrode of the semiconductor element.
The poor connection results in poor yield, thereby leading to high production cost.